1. Field of the Invention
This invention relates to a complementary wiring package and a method for mounting a semi-conductive integrated circuit package. More particularly this invention relates to a complementary wiring package that includes only external pins and internal connecting lines and to a method for mounting a semi-conductive integrated circuit package on a high-density board using the complementary wiring package.
2. Discussion of the Background
Semi-conductor integrated circuits have been miniaturized in response to the increasing demands for downsizing. For example, the ball grid array (BGA) and the chip size package (CSP) have been developed.
However, the development of printed wiring boards has not kept pace with developments in the miniaturization of semi-conductor integrated circuits. As downsizing of the packages of semi-conductor integrated circuits progresses, the number of pins of the semiconductor integrated circuit package becomes a serious problem.
When a large number of pins are mounted on the bottom surface of a semi-conductor integrated circuit package mounted on a conventional printed wiring board, all the pins must be arranged on the perimeter of the bottom surface of the package. This arrangement is necessary to permit connection of the pins to external circuitry. If the pins are arranged in a central region of the bottom surface, for example, signal lines from these pins may not be able to reach the external circuitry.
FIG. 12(a) illustrates an exemplary pin (external bump) configuration of a typical BGA or CSP package 41 described above in which a plurality of external bumps 42 are arranged on a perimeter, but not in a central region, of the bottom surface of the package 41. The external bumps 42 are arranged in four banks, as illustrated in FIG. 12(b), in which two adjacent external bumps in the same bank are spaced 0.8 mm apart, for example. As illustrated in FIG. 12(c), a printed wiring board 48 having a multi-layer configuration has a signal lead 43 on a surface layer 44 for connecting to the external bumps 42 in the first and second banks. The printed wiring board 48 also has a signal lead 45 on a second layer 46 for connecting to the external bumps 42 in the third and fourth banks through a through hole 47 provided to connect the surface layer 44 to the second layer 46. A plurality of dotted circles 42a of FIG. 12(b) represent external bumps that are hypothetically added to the package 41. A through hole 47a of FIG. 12(c) is hypothetically added in order to connect the external bumps 42a to a third layer, for example.
Generally, the above-mentioned printed wiring board 48 can be fabricated by first providing the through holes 47 for connecting the surface layer 44 and the second layer 46 and then adding additional layers (unnumbered). However, having additional through holes 47a makes the fabrication of the board 48 difficult. In this case, through the fabrication step of adding the additional layers, a metal plating layer (not shown) on the surface layer 44 becomes so thick that the wiring on the package 41 can not be implemented. Therefore, a commercially feasible printed wiring board 48 having a plurality of different through holes 47 and 47a has not been fabricated in the above-described way.
Although the so-called "build-up method" has been developed in order to arrange external bumps in the central region of the bottom of the package, fabrication by this method is not practical due to its high manufacturing cost and unpredictable manufacturing quality. FIG. 13 illustrates the build-up method. A multi-layer printed wiring board 51 is configured to have through holes 52, 52a and 52b for connecting to the second layer 56b, the third layer 56c and the fourth layer 56d, respectively. In FIG. 13, reference numerals 53 and 54 denote signal leads disposed on the surface layer 56a and the second layer 56b, respectively. Reference numeral 55 denotes a BGA package, for example.
Also, when a high-density circuit board is designed using semi-conductor integrated circuits, the printed wiring on the board is usually dense. As a result, the printed wiring for connecting components may not be arranged with an appropriate spacing therebetween, and the layout of components may need to be rearranged. Furthermore, the printed wiring board may need to be redesigned in order to reduce the wiring density. All these factors may increase the cost of fabrication.
With regard to the shape of the printed wiring board, the standard rectangle shape is often replaced with a unique shape. This change is due to various restrictions, including a mechanical space problem. As a result of making uniquely shaped boards, some portions of the boards are made useless and wasted.
Conventional wiring techniques for printed wiring boards are described, for example, in Japanese Unexamined Patent Application Nos. JPAP58-153391(1983) and JPAP1-71102(1989), both of which are herein incorporated by reference in their entirety.